www.rfm.com e-mail: info@rfm.com page 1 of 2 ?2008 by rf monolithics, inc. OP4010B - 3/27/08 electrical characteristics characteristic sym notes minimum typical maximum units operating frequency absolute frequency f o 1, 9 663.552 mhz tune range 2 100 ppm tune voltage 10 +3 vdc tuning linearity 1, 8 3% tuning sensitivity df/dv 2, 10 140 300 ppm/v modulation bandwidth 50 khz q and q output voltage into 50 (vswr 1.2) v o 1,3 0.60 1.1 v p-p operating load vswr 1,3 2:1 symmetry 3, 4, 5 49 51 % harmonic spurious 3, 4, 6 -30 dbc nonharmonic spurious 3, 4, 6, 7 -60 dbc phase noise dbc/hz@100hz offset -75 dbc/hz 1khz offset -105 dbc/hz 10k offset -125 noise floor -155 q and q jitter rms jitter 3, 4, 6, 7 2ps p-p no noise on v cc 3, 4, 6, 7 12 ps p-p 200 mv p-p from 1mhz to ? f o on 3 12 ps p-p input impedence (tuning port) 1 k output dc resistance (between q & q ) 1, 3 50 k dc power supply operating voltage v cc 1, 3 3.13 3.3, 5.0 5.25 vdc operating current i cc 1, 3 70 ma operating case temperature t c 1, 3 -40c +85c c lid symbolization (yy=year, ww=week) rfm OP4010B yyww smc-08 ? quartz saw stabilized and filtered ?diff sine? technology ? fundamental-mode oscillation at 663.552 mhz ? voltage tunable for phase lock loop operations ? optical timing reference for forward error correction applications the output of this device is gener ated and filtered by narrowband quartz saw elements at 663.552 mhz. the configuration of this clock is intended to provide a pur e signal for optical timing applications in noisy signal environments. the q/qbar differential output swing of 1 volt about 0 vdc has symmetry better than 1% into loads from 40 ohms to 70 ohms; determined by customer application. the long term frequency accuracy is set by an external reference source allowing this device to complete a phase lock loop design without the usual noise and jitter problems associated with pll?s. absolute maximum ratings rating value units dc suppy voltage 0 to 5.5 vdc tune voltage 0 to 6 vdc case temperature -55 to 100 c 663.552 mhz optical timing clock OP4010B caution: electrostatic sensitive device. observe precautions for handling. cocom caution: approval by the u.s. department of commerce is required prior to export of this device. notes: 1. unless otherwise noted, all specifications include any combination of load vswr, vcc, and temperature, with q and q terminated into 50 ohm loads to ground (see typical test circuit). 2. useful tuning range is in excess of what is required over temp, aging, pushing, pulling & accuracy. 3. the design, manufacturing process, and specifications of this device are subject to change without notice. 4. only under the nominal conditions of 50 load impedance with vswr 1.2 and nominal power supply voltage. 5. symmetry is defined as the pulse width (in percent of total period) measured at the 50% points of q or q (see timing definitions). 6. jitter and other spurious outputs induced by externally generated electrical noise on v cc or mechanical vibration are not included in this specification, except where noted. external voltage regulation and careful pcb layout are recommended for optimum performance. 7. applies to period jitter of q and q . measurements are made with the tektronix csa803 signal analyzer with at least 1000 samples. 8. linearity is a function of the percentage variation from a permitted linear deviation versus the amount of frequency tune ran ge (see linearity definition). 9. one or more of the following united states patents apply: 4,616,197; 4,670,681; 4,760,352.
www.rfm.com e-mail: info@rfm.com page 2 of 2 ?2008 by rf monolithics, inc. OP4010B - 3/27/08 smc-8 8-terminal surface mount case dimensio n mm inches min max min max a 13.46 13.97 0.530 0.550 b 9.14 9.66 0.360 0.380 c 1.93 nominal 0.076 nominal d 3.56 nominal 0.141 nominal e 2.24 nominal 0.088 nominal f 1.27 nominal 0.050 nominal g 2.54 nominal 0.100 nominal h 3.05 nominal 0.120 nominal j 1.93 nominal 0.076 nominal k 5.54 nominal 0.218 nominal l 4.32 nominal 0.170 nominal m 4.83 nominal 0.190 nominal n 0.50 nominal 0.020 nominal a b n j l (x2) d (x8) k (x8) c h g m (x3) e f electrical connections terminal number connection 1v cc 2 ground 3 enable/disable 4 q output 5 q output 6 ground 7 8 tune input lid ground 1 2 3 4 8 7 6 5 top view block diagram q v cc buffer amplifier saw oscillator _ v tune q
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